正码速调整的英文

英文翻译手机版

"正"英文翻译 the first month of the lunar ...
"码"英文翻译 a sign or object indicating ...
"速"英文翻译 fast; rapid; quick; speedy
"调整"英文翻译 adjust; tune-up; trim; trimm ...
"负码速调整" 英文翻译 : negative justification
"码速调整" 英文翻译 : justification
"码速调整比" 英文翻译 : justification ratio
"码速调整位" 英文翻译 : justification bit
"脉冲码速调整" 英文翻译 : pulse justification
"标称码速调整率" 英文翻译 : nominal justification rate
"码速调整（脉冲塞入）" 英文翻译 : justification (pulse stuffing)
"码速调整比（塞入比）" 英文翻译 : justification ratio (stuffing ratio)
"正零负码速调整" 英文翻译 : positive zero negative justification
"车速调整" 英文翻译 : pace changing
"低速调整" 英文翻译 : low speed adjustment; low-speed adjustment
"低速调整针" 英文翻译 : slow-running needle
"高速调整" 英文翻译 : high speed adjustment; high-speed adjustment
"快速调整" 英文翻译 : quick adjusting; rapid adjustment; sharcorrection; split cycle control; split-cycle control
"快速调整的" 英文翻译 : quickadjusting; quick-adjustsing
"迅速调整" 英文翻译 : quick-adjusting
"原速调整" 英文翻译 : primary speed control
"轴速调整器" 英文翻译 : shaft governor
"转速调整杆" 英文翻译 : speed trim lever
"转速调整缸" 英文翻译 : speed setting cylinder
"转速调整器" 英文翻译 : speed adjustment device

Positive justification positive pulse stuffing
正码速调整正脉冲塞入
Performance and test methods of the thirdorder digitalltiplex equipment operating at 3468 kbit sand using poive justification
34368 kbit s正码速调整三次群数字复用设备技术要求和测试方法
Performance and test methods of the second order digital multiplex equipment operating at 8448 kbit s and using positive justification
8448 kbit s正码速调整二次群数字复用设备技术要求和测试方法
Performance and test methods of the fourth order digital multiplex equimpent operating at 139264 kbit s and using positive justification
139264 kbit s正码速调整四次群数字复用设备技术要求和测试方法
The clock obtaining practical circuit in approximately synchronization and clock circuit about symbol synchronization are designed ( realized one circuit ) ; the three controlling circuits with fast and low clock in code speed adjust technique are designed
在此基础上设计了基于scc准同步的一种时钟恢复实现电路和两种字符型起止式同步电路(实现了一种) 。设计了正码速调整技术中快慢时钟的三种控制电路。