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寄生电阻的英文

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"寄生电阻"怎么读用"寄生电阻"造句

英文翻译手机手机版

  • parasitic resistance

例句与用法

  • The source drain extension ( sde ) structure and its reliability are thoroughly studied . first , it is shown that the sde structure can suppress short channel effect effectively and the parasitic resistance at the sde region has an effect on performance . it is proposed that increasing the dose condition in the sde region can reduce the parasitic resistance and should be adopted to achieve high performance for deep submicron devices
    本文对深亚微米源漏扩展mos器件结构及其可靠性进行了深入研究,首先通过仿真验证了源漏扩展( sde )结构对短沟道效应的抑制, sde区寄生电阻对器件性能的影响以及sde区掺杂浓度的提高对器件性能的改善,指出了器件尺寸进一步减小后,提高源漏扩展区掺杂浓度的必要性。
  • It is proposed that the higher dose condition creates more hot carriers but the lower sensitivity to hot carrier effect . therefore , the optimum dose for reliability is determined from the trade - off between the above two aspects . finally , a simple model is proposed and discussed
    本文还深入研究了sde区掺杂浓度对器件热载流子可靠性的影响,指出浓度的提高虽然会产生更多的热载流子,但由于其对热载流子损伤的敏感度降低,因此将存在一种折衷,最后通过一个简单的寄生电阻模型,对掺杂浓度提高后,器件对热载流子损伤敏感度降低的现象做出了很好的解释。
  • A model of the interface state density distribution near by valence band is presented , and the dependence of the threshold voltage on temperature , the c - v characteristics and the subthreshold characteristics are predicted exactly with this model ; the effects of s / d series resistance on the output characteristics , transfer characteristics and effective mobility of sic pmosfets are analyzed . thirdly , the output characteristics and the drain breakdown characteristics are modeled with the procedure medici . the output characteristics in the room temperature and 300 ? are simulated , and the effects of gate voltage . contact resistance , interface state and other factors on sic pmos drain breakdown characteristics are analyzed
    提出了一个价带附近的界面态分布模型,用该模型较好地描述了sicpmos器件阈值电压随温度的变化关系、 c - v特性曲线以及亚阈特性曲线;分析了源漏寄生电阻对sicpmos器件输出特性、转移特性以及有效迁移率的影响;论文中用模拟软件medici模拟了sicpmos器件的输出特性和漏击穿特性,分别模拟了室温下和300时sicpmos器件的输出特性,分析了栅电压、接触电阻、界面态以及其他因素对sicpmos击穿特性的影响。
  • In the design and debugging process we found that two different caps with parallel connection may make the amplifier instability . with the analyses of the nonideal cap molding we found that the response curve of two different caps with parallel connection has a saltation whose impedance is infinity and at this pot the amplifier is easy to oscillate . than some suggestion of the use of cap in amplifier design is presented
    在放大器的设计、调试过程中发现两个不同容值的电容并联会带来电路的潜在不稳定,对实际电容,即带有寄生电感和寄生电阻的电容,建模、分析后发现,不同容值的电容直接并联其响应曲线会有一个阻抗值为无穷大的突变点,该突变点可能会引起电路的自激。
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