多总线的英文
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"多总线"怎么读用"多总线"造句
英文翻译手机版
- multibus
- multibyte
- "多"英文翻译 many; much; more
- "总线"英文翻译 highway; bus; trunk
- "多总线结构" 英文翻译 : multibus architecture; multiple bus architecture; multithread architecture
- "多总线控制" 英文翻译 : multibus control
- "多总线模块" 英文翻译 : multibus module
- "多总线网络" 英文翻译 : multibus network
- "多总线系统" 英文翻译 : multiple bus system
- "多总线处理机" 英文翻译 : multibus processor
- "多总线存储器" 英文翻译 : multibus memory
- "多总线兼容的" 英文翻译 : multibus compatible
- "多总线适配器" 英文翻译 : multibus adapter
- "多总线并列优先序" 英文翻译 : parallel priority multibus
- "多总线串行优先序" 英文翻译 : multibus serial priority
- "多总线多处理机" 英文翻译 : multibus multiprocessor
- "多总线控制处理机" 英文翻译 : multiple bus control processor
- "多总线与多入口系统" 英文翻译 : multiple bus & multiport system
- "总线" 英文翻译 : highway; bus; trunk
- "欧多总管" 英文翻译 : constable odo
- "总线,总线" 英文翻译 : bus
- "萨尔瓦多总统" 英文翻译 : president of el salvador
- "isa总线" 英文翻译 : industry standard architecture
- "scsi总线" 英文翻译 : scsi bus
- "单总线" 英文翻译 : monobus; single bus; unibus
- "副总线" 英文翻译 : secondary main
- "卡总线" 英文翻译 : pc
例句与用法
- Parallel priority , multibus
多总线并列优先序 - Multibus serial priority
多总线串行优先序 - Multiple bus system
多总线系统 - Multi - bus measurement system of weapon products performance based on virtual instruments
基于虚拟仪器的多总线兵器产品性能测试系统 - Information technology - microprocessor systems - high - performance synchronous 32 - bit bus : multibus ii
信息技术.微处理器系统.高性能同步32位总线:多总线 - We also use the technology of the integration of multi - bus to solve the problem of interconnection between the can - device and the non - can - device
论文还采用“多总线集成控制技术” ,从而解决了非can总线设备与can总线的互联问题。 - In order to resolve the problem in test system integration with complex equipments , the optimum way is building a test system with multi - bus
为了解决复杂设备的测试系统集成问题,目前最佳的解决办法是组建多总线(混合)测试系统。 - Communication layer adopted multi - bus structure in this project , which included modbus > dupline - bus and spa - bus , and so better completed data communication function in this project
配电系统的通信层采用多总线结构,结合了modbus总线、 dupline总线、 spa - bus总线三种方式,较好的完成了配电系统的数据通信功能。 - This kind of chip has a higher process velocity ( 40mips ) , support the parallel process arithmetic , with a series port , parallel port , and dma channel . it is very smart in exploitation work
该芯片运行速度高,可达到40mips ,支持并行处理算法,内部为多总线哈佛( harvard )结构,具有串、并口及dma通道,开发方便。 - And the key point is making use of both modularized and rack - and - stuck instrument in one bus system . based on the universality and the problem we faced with in the cpci test system , this subject is the designing of interface module based on the cpci - gpib test system
出于cpci / pxi应用的广泛性,以及我校在cpci / pxi测试系统过程中面临的多总线测试系统集成组建问题考虑,课题组提出了cpci - gpib总线转换接口模块设计要求,本文就是在此背景下完成的。
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