地址总线的英文

• ab address bus
• ad address bus
• addre bus
• bus, address

• "读地址总线" 英文翻译 :    drab
• "宽地址总线" 英文翻译 :    wide address bus; wideaddressbus
• "存储地址总线" 英文翻译 :    memory address bus
• "地址总线结构" 英文翻译 :    address bus structure
• "地址总线控制" 英文翻译 :    abc address bus control; address bus control
• "实际地址总线" 英文翻译 :    physical address bus
• "同步地址总线" 英文翻译 :    sync address bus
• "传送到地址总线" 英文翻译 :    address bus
• "存储器地址总线" 英文翻译 :    memory address bus
• "地址总线驱动器" 英文翻译 :    address bus driver
• "计算机地址总线" 英文翻译 :    cab computer address bus; common address bus
• "数据和地址总线" 英文翻译 :    buses, data and address; data and address bus
• "数据写地址总线" 英文翻译 :    dwab
• "外围单元地址总线" 英文翻译 :    peripheral unit address bus
• "存储器存取地址总线" 英文翻译 :    memory access address bus
• "地址-数据总线" 英文翻译 :    address-data bus
• "地址输出总线" 英文翻译 :    address out bus; address out-bus
• "总线存储地址" 英文翻译 :    highway memory address
• "总线存储器地址" 英文翻译 :    highway memory address
• "总线地址寄存器" 英文翻译 :    bus address register
• "多路传送地址与数据总线" 英文翻译 :    multiplexed address & data bus
• "控制器总线地址寄存器" 英文翻译 :    controller bus address register
• "总线" 英文翻译 :    highway; bus; trunk
• "总线上的信元被信元地址筛选器" 英文翻译 :    cell address screen
• "地址字节" 英文翻译 :    address byte
• "地址字符" 英文翻译 :    address character

• A memory map is the addressing plan for the address bus bits .
  存贮器布局就是地址总线各位的寻址平面图。
• The microprocessor uses the address bus to locate data stored in memory .
  微处理机使用地址总线设定在存贮器中存贮的数据的地址。
• A memory address consists of binary data being output on an appropriate bus which we call the address bus .
  一个存储器地址是由输出到适宜的总线上的二进制数据所组成。这个总线我们称为地址总线。
• Is an address represented by bits on a physical address bus
  是使用物理地址总线中的位表示的地址。
• The actual address that is placed on the address bus when accessing a memory location or register
  当访问内存位置或寄存器时，在地址总线上的真实的地址。
• A " real " address , the value that must be placed on the system address bus to select a physical memory bank or device
  物理地址：真实的地址，其值必须被置于系统地址总线中用于选择物理存储位置或者设备。
• When the processor wants to read ( write ) the contents of a memory location or register within a particular peripheral , it sets the address bus pins appropriately and receives ( transmits ) the contents on the data bus
  当一个处理器想去写（读）某一特定外设中的存储器地址或寄存器中的内容时，处理器设置地址总线并在数据总线上接收（传输）内容。
• Though the analysis about the powerpc bus , there are four parts in biu : instruction pretreatment part , address bus treatment part , data bus treatment part and data pos - treatment part . the second part focuses on the memory consistency
  通过对powerpc结构的总线协议的分析，总线接口部分主要由指令预处理部分、地址总线处理部分、数据总线处理部分和数据后处理部分组成，完成微处理器和外部总线的数据交互。
• Advantages of std bus and structure of pc / 104 bus are referred to design the user - bus , which uses three bus structures , i . e . address bus ( ab ) , data bus ( db ) and control bus ( cb ) . it is well compatible , and the applying system has flexibility and common use and is convenient to extent for users
  该总线采用三总线结构，即地址总线( ab ) 、数据总线( db )和控制总线( cb ) ，具有良好的兼容性，从而使应用系统具有灵活性和通用性等特点，方便用户对应用系统进行扩展。
• The chip simulation network laboratory system this paper disguessed is a distribute network simulation system based on lan . the system ' s architecture is a c / s of three lays . the front platform are the chip simulation network system application program terminer ; the middle lay is a dcom server , it ' s duty is to deal with the communication and data transmission between the terminer and then database server , and to execute the logical operation . the application program just connect with the middle lay and get data from it , the connection and operation with database server will be managed by the dcom server . the duty of database server is to access and backup the final data
  具体是由位于网络各个终端的芯片仿真网络实验系统应用程序为前台；中间层为dcom应用程序服务器，负责处理前台应用程序与后台数据库的通信和数据传输，并执行业务逻辑，前台应用程序只需要与应用程序服务器建立连接，在中间层操作数据即可，与后台数据库的连接和操作由应用程序服务器来统一管理操作。后台数据库只负责数据的存取操作。本论文实施的芯片仿真网络实验系统仿真了主要的逻辑电路器件， 8088cpu ，存储器，寄存器，数据总线，地址总线和控制总线，及其它相关芯片。

• 地址总线的日语：アドレスストラップ アドレスバス