减法电路的英文

• subtract circuit
• subtracting circuit
• subtractingcircuit
• subtraction circuit

• "减法"英文翻译    subtraction; subduction
• "电路"英文翻译    circuit; electric circuit; e ...
• "加减法电路" 英文翻译 :    adder and substracter circuit
• "减法电路放大器" 英文翻译 :    differential amplifier
• "减法电路失落脉冲检测器" 英文翻译 :    direct cancellation missing pulse detector
• "乘法电路" 英文翻译 :    multiplying circuit
• "除法电路" 英文翻译 :    dividing circuit; division circuit
• "单触法电路" 英文翻译 :    one-shot circuit
• "加法电路" 英文翻译 :    add circuit; added circuit; adder circuit; circuit, summing; summator; summing circuit; summingcircuit
• "加器, 加法电路" 英文翻译 :    adding circuit
• "全加法电路" 英文翻译 :    full adder circuit
• "低位加法电路" 英文翻译 :    low order add circuit; low-order add circuit
• "二进加法电路" 英文翻译 :    binary adding circuit
• "高次加法电路" 英文翻译 :    high order add circuit
• "高阶加法电路" 英文翻译 :    high-order add circuit
• "一位加法电路" 英文翻译 :    one column add circuit
• "补码移位加法电路" 英文翻译 :    complement and carry add circuit
• "二进位加法电路" 英文翻译 :    one-column binary add circuit
• "二进制加法电路" 英文翻译 :    binary adding circuit
• "分离进位加法电路" 英文翻译 :    separate carry adder
• "色度信号加法电路" 英文翻译 :    chrominance signal summation circuitry
• "十进位加法电路" 英文翻译 :    decimal add circuit
• "十进制加法电路" 英文翻译 :    decimal add circuit
• "单触法电路 冲息触发电路" 英文翻译 :    one-shotcircuit
• "电流分压器电路, 除法电路" 英文翻译 :    divider circuit

• An improved high - resolution current - mode sorter is presented . its structure complexity is o ( n ) , which is crucial to the expansion of its size , and its dynamic range is large . only one clock signal and one reset signal are needed . no biasing signal is required . the operation point is constructed according to the input current , so it is self - adaptive , which is very important for an all - purpose component . in average value circuit , subtraction circuit , winner - take - all ( wta ) circuit and control circuit , it has good performance even at a large input current . this sorter has high precision , high resolution and low power , as has been proved via hspice simulation . it can be implemented in the standard digital cmos technology and widely used in many fields , so it is of great value in applications
  提出了一种改进的高精度电流型排序电路.它的结构复杂性仅为o ( n ) ,便于扩展;动态范围大;它是自适应的,工作点由输入电流确定,故不需要偏置信号,这对作为通用器件使用的排序电路来说是很重要的.通过利用平均值电路、减法电路、 wta电路和控制电路,可以使该电路在大输入电流下依然保持高性能. hspice模拟表明该电路具有高准确性、高精度、低功耗的特点.它能用标准数字cmos工艺来实现,可以被应用于很多领域,具有很高的应用价值

• 减法电路的日语：ひきざんかいろ