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nmos造句

"nmos"是什么意思  
造句与例句手机版
  • Researched the methods to test interconect resource ( ir ) witch include interconnect lines and nmos switchs
    研究完成了对互连资源( configrableinterconnectresource )的测试。
  • Semiconductor integrated circuits . detail specification of type jm2148h nmos 1024 4 bit static random access memory
    半导体集成电路. jm2148h型nmos 1024 4位静态随机存取存储器详细规范
  • This is due to the fact that each transistor in a cmos circuit is actually made from a pmos transistor and an nmos transistor
    这是由于cmos里的每一个晶体管都是由一个pmos和一个nmos晶体管组成的。
  • The use of edgeless nmos transistors in place of 2 - edgeless transistors eliminates the excessive radiation - induced edge leakage in many cmos parts after irradiation
    为了测试最新设计的1万门cmos门阵列的抗辐射水平,本文设计了一个cmos集成电路测试样片。
  • In order to get strain from the channel , by process , deposit si3n4 at nmos and adopt the silicon - germanium epitaxy on source / drain by pmos , can effective improve nmos and pmos electronic characteristic
    中文摘要近年来,为了提升金氧半场效电晶体工作频率及性能,尺寸不断微缩,让相同面积晶片可以拥有更多的电晶体数量。
  • Especially in cmos n - well integrated circuits technology , the body effect will cause the nmos threshold voltage following the pumping voltage to be lifted and then the highest pumping voltage will be limited
    特别是在n阱集成电路工艺,体效应使得每一阶nmos管的阈值电压都不断抬升,以至于电荷泵的最高输出电压受到限制。
  • Besides , silicon substrate is bent by applying external mechanical stress , the lattice of channel will have strain due to uniaxial tensile stress by nmos and strain due to uniaxial compressive stress by pmos
    但微影技术已经接近瓶颈,所以我们必须另外寻找能够提升电晶体效能的方法,应变矽就是目前提升电晶体性能最热门的方法。
  • We simulated and adjusted the energy and dose of implant impurity by the aid of silvaco software so as to confine the vt value in a reasonable range and finally we got eligible device samples
    最后,我们基于silvaco软件模拟并调节了杂质注入的能量和剂量,并结合实验结果调整了pmos管和nmos管的阈值电压,制备出了合格的bmhmt工作模式的soi异质结mosfet单管。
  • Here we take the strained si cap layer with relaxed sige layer grown epitaxially by uhvcvd to form nmosfet and relaxed si cap layer with strained sige layer to form pmosfet as comparison to bulk sample
    在论文中我们给出了两种不同的材料结构来与体si材料进行比较,用应变的sicap层和弛豫的sige材料层构建nmos管,用弛豫的sicap层和应变的sige材料层构建pmos管。
  • In the third chapter , a methodologies to realize second - order band - pass filter with which center frequency tuned in a wide range using mcdi ( multiple output current - mode differential integrator ) , these two kinds of mcdi are composed of pmos and nmos input transistors respectively , lastly we compare these two integrators " merits and disadvantages
    第三章:提出了输入级分别为pmos管、 nmos管的多输出端电流模式全差分积分器,并由此构成了中心频率连续可调的二阶带通滤波器,同时比较了二者的优缺点。
  • It's difficult to see nmos in a sentence. 用nmos造句挺难的
  • An analytical mosfet threshold voltage shift model due to radiation in the low - dose range has been developed for circuit simulations . experimental data in the literature shows that the model predictions are in good agreement . it is simple in functional form and hence computationally efficient . it can be used as a basic circuit simulation tool for analysing mosfet exposed to a nuclear environment up to about 1mrad . in accordance with common believe , radiation induced absolute change of threshold voltage was found to be larger in irradiated pmos devices . however , if the radiation sensitivity is defined in the way we did it , the results indicated nmos rather than pmos devices are more sensitive , especially at low doses . this is important from the standpoint of their possible application in dosimetry
    该模型物理意义明确,参数提取方便,适合于低辐照总剂量条件下的mos器件与电路的模拟。并进一步讨论了mosfet的辐照敏感性。结果表明,尽管pmos较之nmos因辐照引起的阈值电压漂移的绝对量更大,但从mosfet阈值电压漂移量的摆幅这一角度来看,在低剂量辐照条件下nmos较之pmos显得对辐照更为敏感。
  • Converters switched by cmos switches rather than nmos or pmos ones have been studied in detail and fabricated as some sample dies by cmos technology . in a single conversion circuit unit switched by cmos switches , the test result indicates that the output current can arrive at 9 . 8ma a bit less than the simulation result of 12ma
    采用cmos工艺,用cmos开关取代单管nmos和pmos开关,对变换器进行仿真研究并投片试制,测试结果表明其输出电流为9 . 8ma ,比仿真结果12ma略低。
  • The proposed modulator uses 0 . 35um standard cmos process , the nmos and pmos threshold voltage is 0 . 54 volt and - 0 . 48 volt , respectively , and the power supply is 1 . 5 volt . the nyquist converter rate is 50 khz , oversampling ratio is 80 . the proposed modulator can obtain 98db dynamic range , 16 bits converter resolution , and fits for high - fidelity , digital - audio application
    本设计采用0 . 35微米标准cmos工艺,其中nmos和pmos晶体管的阈值电压分别为0 . 54伏和- 0 . 48伏,电源电压为1 . 5伏,奈奎斯特转换率为50khz ,过采样率为80 ,该调制器可实现动态范围98db , 16位的转换精度,适合高保真数字音频应用。
  • Compared with the similar research results , the weighted control ic here has the following characteristics : ( 1 ) the circuit structure is simpler ; ( 2 ) the chip ' s fabrication is compatible with standard cmos process ; ( 3 ) n - mosfets with high w / l ratio and short channels are used for weighting and output to reduce the insertion loss ; ( 4 ) the weighting factor varies in a relatively wide range with the controlling signals ; ( 5 ) input and output impedance approach 50 in low frequency ( e . g . 50mhz ) , while in higher frequency they slightly deviate from 50 , hence the energy reflection lower than 0 . 1 ; ( 6 ) it completes the functions of sampling , weighting , controlling and summing of high frequency analog signals
    它的加权控制电路与已报道的相关电路相比具有如下特点:电路结构简单;制造工艺与普通cmos工艺兼容:短沟道,高宽长比的nmos晶体管具有低的通导电阻,将其作为加权、输出器件可降低由电路引起的插入损耗;改变加权信号,可实现权值在较大范围内的连续变化;输入、输出阻抗在低频(如50mhz )下接近50 ,而在高频下略有偏离50 ,但反射系数均低于0 . 1 ;实现了对高频信号的取样、加权、控制、叠加功能的迭加。
  • Secondly , the radiation effects of the system of silicon gate si / sio2 ( silicon gate nmos and pmos ) implanted bf2 are made a deep systematic study . especially , the relationship between threshold voltage shift ( vth and vit vot ) in radiated mos transistor and irradiation dose rate , irradiation dose , irradiation temperature , bias voltage , device structure as well as annealing condition is explored emphatically
    在此基础上,对bf _ 2 ~ +注入硅栅si sio _ 2系统低剂量率辐照效应进行了深入系统的研究,着重研究了bf _ 2 ~ -注入mos管阈值电压漂移( vth和vit 、 vot )与辐照剂量率、辐照总剂量、辐照温度、偏置电场、器件结构以及退火条件的依赖关系。
  • Based on specific fault models , the testing configurations are implemented by handcraft following the popular testing method of data - bus . only four testing configurations are used to completely test interconnect resources . we also developed a platform for online hardware software co - testing of fpga devices
    基于普通数据总线的测试方法,针对互连资源主要由线段和nmos开关管组成的特点及其自身的故障模型,通过手工连线实现测试配置,仅通过4次编程就实现了对其完全测试。
  • The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power , and analyzes the principles of work , merts and shortcomings of these technologies , based on the absorption of these technologies , it designs a 1 . 5v low power rail - to - rail cmos operational amplifier . when designing input stage , in order to enable the input common mode voltage range to achieve rail - to - rail , it does not use the traditional differential input pair , but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure , and uses the proportional current mirror technology to realize the constant transconductance of input stage . in the middle gain stage design , the current mirror load does not use the traditional standard cascode structure , but uses the low voltage , wide - swing casecode structure which is suitable to work in low voltage . when designing output stage , in order to enhance the efficiency , it uses the push - pull common source stage amplifier as the output stage , the output voltage swing basically reached rail - to - rail . the thesis changes the design of the traditional normal source based on the operational amplifier , uses the differential amplifier with current mirror load to design a normal current source . the normal current source provides the stable bias current and the bias voltage to the operational amplifier , so the stability of operational amplifier is guaranteed . the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier
    本论文对国内外的模拟低电压低功耗技术做了广泛的调查研究,分析了这些技术的工作原理和优缺点,在吸收这些技术成果基础上设计了一个1 . 5v低功耗轨至轨cmos运算放大器。在设计输入级时,为了使输入共模电压范围达到轨至轨,不是采用传统的差动输入结构,而是采用了nmos管和pmos管并联的互补差动输入对结构,并采用成比例的电流镜技术实现了输入级跨导的恒定;在中间增益级设计中,电流镜负载并不是采用传统的标准共源共栅结构,而是采用了适合在低压工作的低压宽摆幅共源共栅结构;在输出级设计时,为了提高效率,采用了推挽共源级放大器作为输出级,输出电压摆幅基本上达到了轨至轨;本论文改变传统基准源基于运放的设计,采用了带电流镜负载的差分放大器设计了一个基准电流源,给运放提供稳定的偏置电流和偏置电压,保证了运放的稳定性;并采用了带调零电阻的密勒补偿技术对运放进行频率补偿。
  • Typical current - mode continuous - time filters include current - mode filter based on current conveyor , current - mode filter based on ota - c and current - mode filter based on current mirrors . they are rapidly developed in bandwidth , speed , precision , etc , and they bring the filter theories to noble times of fully integrated system development . there are many articles on continuous - time filter based on ota in nearly two years
    在对版图设计的步骤、方法、所用软件以及cmos基础和工艺流程这些版图设计所需的基本理论研究的基础上,给出了本设计中用到的电容和nmos及pmos管版图结构,得到了具体ota - c滤波器版图,并对版图进行了几何设计规则检查和版图验证。
  • After structure design aimed to high transconductance , parameters of device structure are modified in detail . the simulation results of soi nmos with strained si channel show great enhancements in drain current , effective mobility ( 74 % ) and transconductance ( 50 % ) beyond conventional bulk si soi nmosfet . the strained - soi nmosfet fabrication process is proposed with lt - si ( low temperature - si ) technology for relaxed sige layer and simox technology for buried oxide
    其次,根据器件参量对阈值电压和输出特性的影响,以提高器件的跨导和电流驱动能力为目的设计了strained - soimosfet器件结构,详细分析栅极类型和栅氧化层厚度、应变硅层厚度、 ge组分、埋氧层深度和厚度以及掺杂浓度的取值,对器件进行优化设计。
  • A switch ic for analog signal processing is designed and implemented , which can fulfill the functions of sampling , weighting , controlling and summing of high frequency analog signals . the circuit consists of three parts : four channel analog switches , a voltage reference and the control circuitry . each analog switch is comprised of two high - transconductance n - mosfets with high w / l ratio , which realize the fine tuning and coarse tuning of the input signal respectively
    本文研究并设计了一种可对高频信号进行取样、加权、控制、叠加的模拟信号处理丌关集成电路,它包括模拟开关、电压基准源和移位寄存器三个功能模块,通过两个高宽长比的高跨导nmos晶体管实现权值的粗调和微调。
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