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失性

"失性"的翻译和解释

例句与用法

  • A record store is created in platform - dependent locations , like nonvolatile device memory , which are not directly exposed to the midlets
    记录存储在与平台相关的位置(比如非易失性设备存储器)创建,这些位置不直接公开给midlet 。
  • Includes a transaction manager component that coordinates a transaction involving at most , a single durable resource or multiple volatile resources
    包括一个事务管理器组件,它对涉及最多一个持久性资源或多个易失性资源的事务进行协调。
  • Infrastructure handles volatile resources and at most one durable resource that supports single - phase notifications , the transaction remains in the ownership of the
    基础结构处理易失性资源和最多一个支持单阶段通知的持久性资源,事务就将保持为
  • You can also store up to four 64k - deep arbitrary waveforms in non - volatile memory with user - defined names to help you find the right waveform when you need it most
    任意波形以用户定义的名称保存在非易失性存储器中,从而能随时得到所需要的正确波形
  • Volatile reads and writes , however , are totally ordered across threads ; the compiler or cache cannot reorder volatile reads and writes with each other
    )但是,易失性的读和写是完全跨线程安排的,编译器或缓存不能在彼此之间重新排序易失性的读和写。
  • The bubbles are magnetic garnet crystals grown on nonmagnetic substrate , ranging in size from 2 to 30 micrometers , and used as nonvolatile data storage
    泡沫是有磁性的深红色晶体,产生于无磁性的基地层,并会扩大到2到30微米,并产生非易失性的数据保存。
  • It includes ik - byte ram , 512 - byte eeprom and 16k - byte flash . it is rapidly extended and applied by its characteristics of high - speed and hardly possible lost
    Atmega161具有1k字节ram , 512字节eeprom , 16k字节flash ,并凭借其高速,非易失性的特点而被迅速推广应用。
  • Infrastructure administrates a transaction inside a single application domain that involves at most a single durable resource or multiple volatile resources
    System . transactions基础结构管理单个应用程序域内的事务,此类事务最多涉及单个持久性资源或多个易失性资源。
  • A method of storing parameters and importance data using nonvolatile memory in test instrument to avoid lose in ram caused by power - down are proposed
    摘要针对在使用ram保存数据由掉电带来的数据丢失问题,提出了一种利用非易失性存储器存储测试仪器参数和重要数据的方法。
  • The existing jmm says that volatile reads and writes are to go directly to main memory , prohibiting caching values in registers and bypassing processor - specific caches
    现有jmm表明易失性的读和写是直接和主存打交道的,这样避免了把值存储到寄存器或者绕过处理器特定的缓存。
  • 更多例句:  1  2  3  4  5
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