The alu designed with the methodology of full custom can realize higher speed , lower power dissipation and smaller area , and it has great value in application and significant meaning in practice 采用全定制方法设计的算术逻辑部件速度快、功耗低、面积小,具有广泛的应用价值和重要的实践意义。
The whole ftlvds chip is a combination of lvds driver , lvds receiver , serializer and deserializer . it ' s layout is implemented by the means of full - custom and half - custom mixed design approach , and the chip is taped out Ftlvds芯片是收发模块和串并模块的组合，其版图实现采用了全定制单元和标准单元混合的设计方法，并且进行了投片封装。
The full - custom method is different from the semi - custom method . most people pay their attention to the verification method of semi - custom design , and there is a lack of verification method for full - custom 全定制设计方法与半定制设计方法有较多的差异,现有的验证方法大多注重于半定制的功能验证方法研究,缺少全定制设计的功能验证方法。
X processor uses full - custom design method , includes dynamic branch prediction and super scalar technology , and its scale is very large . in order to validate the design , we must apply function verification X微处理器是一款采用全定制设计方法设计的微处理器,处理器中包含动态分支预测和超标量等微体系结构技术,内部结构复杂,设计规模很大,对其进行功能验证有很大难度。
The new method can be divided into two parts : the construction of verification model and the construction of verification platform . not like the semi - custom verification model is built from the design specification , the full - custom verification model is built from full - custom design data 对于验证模型的建立,在半定制设计验证方法中,一般是以系统描述为基础建立验证模型,而在我们的全定制设计验证方法中,验证模型主要以全定制设计数据为基础建立的。
Since this type of converter has little requirement for the digital parts and its digital structure is relative simple , the whole design approach of the converter is the same with the design flow of the analog circuit that is to draw schematics and layout manually , edit the drc lvs files to verify the layout and check its performance by means of post - simulation 由于本设计对数字电路部分的性能要求较宽松，而且电路结构相对简单，所以采用和模拟电路设计一致的设计方法，即：使用原理图输入设计，全定制编辑版图，对版图进行drc ， lvs以及后仿真验证。使用的是cadence中的一系列cad工具。
After having analyzed the theory of the calculator circuit thoroughly , the author made use of the characteristic of the calendar circuit and put forward a new design method , namely replacing the static circuit with the dynamic circuit to reduce the area of whole chip . now the author has finished the design of the calendar circuit and accomplished the layout design with the full - custom method 本文作者在透彻分析计算器原理的基础上，利用万年历电路的工作频率的特点，提出了以cmos动态门代替静态触发器的设计方法，独立设计出万年历部分电路，将其与计算器部分电路紧密融合，构成一块完整的数字大规模集成电路，并以全定制的方法实现了整个芯片的版图设计。
This task of self - determination design of high speed lvds i / o interface chip , as a part of the project " high speed digital signal interlink and transmit technology " on the foundation of national laboratory for parallel & distributed processing , on the one hand provide absolutely necessarily experiment foundation and hardware elements for the research of high speed digital signal transmission , on the other hand make an available exploration for the forward design methods of ic chips by means of full - custom and half - custom mixed design approach 本课题对lvds高速i o接口单元芯片ftlvds的自主设计研究，作为国防科技重点实验室基金项目“高速数字信号互连与信号传输技术”的一部分，一方面为进行高速数字信号传输的研究提供了不可缺少的实验依据和硬件基础，另一方面也是对ic芯片正向设计中采用全定制和半定制的混合设计方法的一次有益探索。
Focusing on a 64 - bit high - performance general purpose microprocessor with fully independent intellectual property , the thesis investigates a 128 - word 65 - bit general register file with 12 - read and 8 - write ports which is a representational one for its large - scale and multi - port characteristics in that microprocessor , and realizes its full custom design with high speed in read and write access . from the layout simulation result , under the 0 . 18um process , the upper limit working frequency for the register file is 900mhz 本文面向一款具有完全自主知识产权的64位高性能通用处理器,对其中具有代表性的128字65位12读端口和8写端口的通用寄存器文件进行研究,实现了它的高速读写全定制设计,版图模拟结果表明,在0 . 18um工艺下,设计可以工作的时钟频率上限为900mhz 。
