Where more than one specification is involved , it is best to make the sequence of test cases correspond to the sequence of statements in the primary specification for the unit 如果测试多个规格,最佳方法是将测试用例的顺序与单元的主要规格声明顺序保持一致。
As for branch testing , it is important for test designers to beware that concentrating on conditions could distract a test designer from the overall functionality of a unit 至于分支测试,它是重要为测试设计人员当心,集中情况能与单元的整体功能分散测试设计人员。
The most similar case is used as the design prototype . then with function decomposition and unit split , the chief function units and the assistant units are all obtained 以最相似实例作为设计原型，对其进行功能分解与单元拆分，获取各主功能单元及辅助功能单元。
Changing the cell - related property values of the column , however , will update the template cell and all other cells in the column , and refresh the column display if necessary 但是，更改列的与单元格相关的属性值将更新模板单元格和列中所有其他单元格，必要时还将刷新列显示。
Instead of the conventional node - node model , the spot - weld is modeled by a new short beam element introduced into between node and clement , which is subject to the tensile and shear forces 新型焊接单元在有限元节点与单元之间引入短梁单元来模拟焊接关系，单元承受拉伸力和剪切力。
Handlers for cell - related events receive event argument objects with cell properties that you can use to manipulate cells without causing rows to become unshared 与单元格相关的事件的处理程序接收具有单元格属性的事件参数对象，您可以使用行属性对行执行操作，而不会使行变为非共享行。
Also called deployment manager , it manages the multiple nodes in a distributed topology by interacting with the node agents running on each physical computer in the cell 也叫做deployment manager ，它通过与单元中每台实际计算机上运行的node agent进行交互来管理分布式拓扑中的多个节点。
In this thesis , we research the key problems in ic chip image processing , including edge completion and graphics recognition , template matching and unit recognition , image registration technique 本文研究了集成电路芯片图象处理中的关键技术。主要包括边缘修复和图形识别技术，模板匹配与单元识别技术，图象拼接技术。
Similar with design verification problem , to predigest chip level layout synthesis problem , the layout synthesis based on the standard - cell methodology can be divided into two levels : inner standard - cell and among standard - cells . however , along with the increasing of chip size , chip level layout synthesis problem become more complex if it still bases on general manual standard - cell . because the router cannot impose the characteristic of the transistors in the standard - cell , it may reduce the performance of the whole chip 通常，基于标准单元布图模式将版图综合划分成单元内与单元间两个层次，以简化芯片级自动版图综合问题的复杂性；但随着芯片规模的不断扩大，基于主要以手工定制的小规模标准单元，芯片级版图综合问题的复杂性不断增大，且标准单元间布线无法充分利用单元内晶体管特征，影响芯片的整体性能。
