High - level synthesis has been developed on the base of logic synthesis . it starts from the behavioral design description of high - level and outputs the structural description with lower level as a result . so the design complexity can be simplified and design efficiency can be raised 高级综合是在逻辑综合的基础上发展而来的，它从高层次的行为描述开始，自动综合出低层次的结构描述，从而降低了设计复杂度，提高了设计效率。
Based on the pilot studies on the evaluation index system and the method of sustainable development on loess plateau , this paper has designed the structure frame of the index system including three types of index including one advanced comprehensive index - the comprehensive index of sustainable development , five basic indexes and thirty element indexes , the analytic hierarchy process which can be used to calculate the sustainable development index weight supported by entropy technology . the model can be used to evaluate the sustainable development of loess plateau comprehensively integrated by mathematical method such as compositive appraisement method of hierarchy multilayer 、 main component analytical method 、 regression analytical method and so on . pilot study on the index system has been carried out on the leoss plateau of the northern shaanxi , and the results is promising 通过对黄土高原可持续发展评价指标体系和方法的初步研究，设计出了包括1个高级综合指标- -可持续发展综合指数、人口状况等5个基本指标和人口自然增长率等30个元素指标的层次性指标体系结构框架，熵技术支持下确定可持续发展指标权重的层次分析法，以及由递阶多层次综合评价、主成份分析和回归分析等数学方法所集成的可持续发展全面综合评价模型，并以陕北黄土高原为例进行了具体的应用分析与评价。
In this paper we put forward two kinds of high level synthesis method based on researching the technology adopted in other hls or hls optimization . one is a specific hls for control intensive designs , we adopt control - flow graph as the internal representation and use the speculation technology during the scheduling 本文提出了两种类型的高级综合方法，其一是提出了针对控制占主要部分的电路的高级综合方法，该方法采用了基于控制流图的中间表示结构，在调度过程中采用了针对该电路特点的推测技术。
Abstract : constant components and output opened ports in the result of high - level synthesis lead to explicit redundancy in gate - level technology mapping . explicit redundancy can not improve the performance , but increases power consumption , enlarges circuit area and decreases its testability , so it should be removed . this paper proposes a queue loop optimization algorithm to remove explicit redundancy completely which decreases the circuit area and improves the testability 文摘:高级综合结果中常量元件和输出悬空端口导致门级工艺映射结果中存在显式冗余.显式冗余无助于提高电路性能，反而增加功耗，降低电路的可测试性，使电路面积增大，应予消除.文中提出了显式冗余的队列循环优化算法，完全消除了此类冗余，从而有效地减少了生成电路的基片面积，提高了电路的可测试性
It is efficient when applied in the control intensive design but the quality of synthesis " results is not well accepted when used for other type of design . the other is a multi - target hls optimization method , used before the subtask of hls scheduling . the essence of the method is a system partition algorithm , the multi - target optimization is reflected when convert the behavioral description into a graph . the purpose of the partition is to find the explicit control relation and parallel computation 其二是提出了一种多目标的高级综合优化策略，该方法用在高级综合的调度之前，其核心是对系统进行划分，在将行为描述转化为内部表示模型的时，通过探索中间表示结果的关系来发现原设计描述中的控制关系和并行计算，以便在高级综合中取得理想的结果，同时将行为描述转化为图的过程中体现多种优化目的，所采用的中间表示模型为基于petri网的内部表示模型，划分采用了模拟退火算法。
Now high - level design method based on high - level synthesis is a popular research project in the field of asic design and this kind of method has not been put into use completely , so the paper researches the asic design in the automation system of a kind of auv with high - level design method based on high - level synthesis and will devote to the development of eda technology of our country greatly 基于vhdl高级综合的高层次设计方法是目前asic设计业普遍关注的热点研究课题，该方法在国内尚未达到实用化程度，因此本文采用该方法对水下航行器自控系统的集成设计进行研究，将为我国eda技术的发展作出创造性的贡献。
