Combinations of igbts controlled by four - step current commutation algorithm , was implemented by the cpld , which was also forecasted and validated by the simulation and experiment 为进行对矩阵式变换器系统的实验研究，采用cpld (复杂可编程逻辑器件)实现了igbt组合双向开关的四步换流逻辑控制，并通过仿真和实验进行了预测和验证。
The advanced digital signal processor ( dsp ) and complicated programmable logic device ( cpld ) are applied to configure the digital controller of the braking system . the power drive circuit is composed of power mosfet and gate drive intergraded circuit 以先进的数字信号处理器( dsp )和复杂可编程逻辑器件( cpld )为核心，完成了数字式刹车控制器的硬件设计。
Finally the module is accomplished successfully after installation and debugging . it mainly consists of the minimum system of dsp , a / d conversion circuit , cpld control logic , watchdog circuit , op amplifier and filter circuit 该模块主要由数字信号处理器最小系统、模数转换电路、复杂可编程逻辑器件控制逻辑、看门狗电路、运算放大器电路和模拟滤波器电路构成。
With the aid of the design thoughts of other flat panel displays , a control circuit is designed firstly , which can be applied on small scale of oled , and does a hardware implementation based on programmable logic device 我们在参考其他平板显示器驱动控制电路的基础上,提出了应用于oled驱动的控制电路方案,同时利用复杂可编程逻辑器件进行了验证,并对此电路进行了仿真。
The time order driving circuit of ccd is designed and debugged with cpld ( complicated programmable logic device ) , which make the whole driving circuit ' s volume smaller , shorten design period , modify design at any time , and enhance reliability and agility of circuit 采用cpld (复杂可编程逻辑器件)设计调试了ccd时序驱动电路，使整个驱动电路体积小，缩短了周期，可随时修改设计，提高了电路的可靠性和灵活性。
Utilizing phase locked loop technique with complex programmable logic devices ( cpld ) , a method to perform high - speed data acquisition , storage and transmission for transformer testing , which solves the problem of data acquisition for high frequency band , is proposed 摘要提出了利用锁相环技术结合复杂可编程逻辑器件( cpld )实现对变压器测试信号的高速采集、存储、传输的方法，很好地解决了对变压器高频特性信号的采集。
The hardware circuitry of the whole digital scan conversion system is realized through the complex programmable logic devices so as to improve stability , flexibility and real - time of the digital hardware circuitry . a high - performance digital scan conversion system is researched and developed 整个数字扫描变换系统的硬件电路都使用复杂可编程逻辑器件实现，增加了数字电路系统的实时性、稳定性和灵活性，设计和实现了一种高性能的数字扫描变换系统。
Then , the author specially studies the characteristic of system architecture of the dsp , paints schematic principle diagram and pcb diagram of the hardware circuit system , writes the program decoding and partial data processing of the cpld , adopting verilog hdl hardware describing language 然后，研究了dsp芯片结构体系的特点，绘制了硬件电路系统的原理图和pcb图，且采用veriloghdl硬件描述语言编写了复杂可编程逻辑器件( cpld )的译码与部分数据处理程序。
As a research trial for this thesis , we designed a real circuit based on cpld ( complex programmable logic device ) by vhdl ( very high speed integrated circuit hardware description l anguage ) for the hardware algorithm for euclidean distance transform with multilayer design method , called top - to - down 一down )的方法，设计了一个基于复杂可编程逻辑器件cpld ( co哪lexprogammablelogiedeviee )的基本电路，用以验证基于硬件的欧几里德距离转换算法的各项性能。
In fact , how to program a device driver in windows is the most difficult and the abstruse work in windows programming fields . with the development of the design of digital system , the cpld ( complex programmable logic device ) has been applied extensively 在工业ct中，设计基于cpld （ complexprogrammablelogicdevice ? ?复杂可编程逻辑器件）的多通道数据采集与存储系统是准确获取工业ct图像数据工作的难点，而编制多通道数据采集与存储系统的设备驱动程序是windows编程中最复杂、最深奥的工作。
