cmos集成电路造句

例句与造句

1. The use of edgeless nmos transistors in place of 2 - edgeless transistors eliminates the excessive radiation - induced edge leakage in many cmos parts after irradiation
2. Designs of redundant , radiation hardening and anti - lock of cmos integrate circuit were developed as the reliability steps of the on - board embedded computer system
3. Mems optical switch for optical communication is fabrication by silicon surface micromachining technology . surface micromachining technique , based on the standard cmos processes , in the other hand , offers greater flexibility for realizing free - space optical systems on a single chip
4. The implementation of in - chip clock generator is often based on modern cmos ic process technology which is usually adopted by very large scale digital system . while designing a deep sub - micrometer cmos circuit , delay , power consumption and die size are of the main factors that must be considered
5. In fault location area , a novel algorithm for fault location using iddq and iddt is designed in this paper . this algorithm is realized by combination of iddq and iddt based on wavelet transform . after classification of the potential faults by pattern recognition , the actual faults can be accurately located effectively
6. 用cmos集成电路造句挺难的，这是一个万能造句的方法
7. Automatic water - measuring meter is the combinative production of traditional method and present cmos integration circuit technology . it consists of water - level sensor and mainframe circuit . on the basis of analyzing its application , this paper gives the design of mainframe circuit , including time circuit , time - sequence circuit , input - interface circuit , switch circuit and power circuit
8. Since the early 1990s , when the electronics industry came to the stage of digital technology , china has broken through in high - end series personal computers and servers , large - scale parallel computer systems , chinese electronic publishing systems , large - scale spc exchanges for central offices , mobile communications systems , sdh wdm fiber communications systems , thin route satellite communications systems , new generation digital video terminals , manufacturing technology for 0 . 8 - 0 . 35 m cmos integrated circuit chips , etc
9. Two other effects are transient phenomenon called single event upset ( seu ) and single event latchup ( sel ) . in this paper , some means to harden the devices against these phenomena are used . guard banding around nmos and pmos transistors greatly reduces the susceptibility of cmos circuits to lachup